Research in the Sherrill group focuses on the development of ab initio electronic structure theory and its application to problems of broad chemical interest, including the influence of non-covalent interactions in drug binding, biomolecular structure, organic crystals, and organocatalytic transition states. We seek to apply the most accurate quantum models possible for a given problem, and we specialize in generating high-quality datasets for testing new methods or machine-learning purposes. We have developed highly efficient algorithms and software to perform symmetry-adapted perturbation theory (SAPT) computations of intermolecular interactions, and we have used this software to analyze the nature of non-covalent pi-interactions in terms of electrostatics, London dispersion forces, induction/polarization, and short range exchange-repulsion. 

Kishore Ramachandran received his Ph.D. in Computer Science from the University of Wisconsin, Madison in 1986, and has been on the faculty of Georgia Tech since then. He led the definition of the curriculum and the implementation for an online MS program in Computer Science (OMSCS) using MOOC technology for the College of Computing, which is currently providing an opportunity for students world-wide (with an enrollment of over 10,000) to pursue a low-cost graduate education in computer science. He has served as the Director of STAR Center from 2007 to 2014, and as the Director of Korean Programs for the College of Computing from 2007 to 2011. Ramachandran has also served as the Chair of the Core Computing Division within the College of Computing. His research interests are in architectural design, programming, and analysis of parallel and distributed systems. Currently, he is leading a project that deals with large-scale situation awareness using distributed camera networks and multi-modal sensing with applications to surveillance, connected vehicles, and transportation. He is the recipient of an NSF PYI Award in 1990, the Georgia Tech doctoral thesis advisor award in 1993, the College of Computing Outstanding Senior Research Faculty award in 1996, the College of Computing Dean's Award in 2003 and 2014, the College of Computing William "Gus'' Baird Teaching Award in 2004, the "Peter A. Freeman Faculty Award" from the College of Computing in 2009 and in 2013, the Outstanding Faculty Mentor Award from the College of Computing in 2014, and became an IEEE Fellow in 2014.

Eric joined PACE in 2021, and currently leads the Research Computing Facilitation team, after having worked as a Cyberinfrastructure Architect and RCF. Before joining PACE, Eric could be found at Indiana University as a systems engineer with the XSEDE Campus Bridging team, providing HPC-oriented consultations to institutions across the US. He also worked closely with the Cyberinfrastructure Research Center at IU, providing support for several different science gateway projects. Prior to that, his research in condensed matter physics at Florida State University involved computational studies of the optical properties of strongly correlated materials.

Aaron joined the PACE team in May 2019 as a computing facilitator, and currently serves as the Scheduler Architect. Through supporting users, he grew to appreciate the opportunity to improve HPC workflows through scheduler and systems configurations that lower the barrier to entry and passively optimize code execution. Additionally, Aaron has been involved in the Vertically Integrated Projects (VIP) program since Spring 2020, mentoring multiple teams of students with the Team Phoenix VIP through international HPC competitions at the ISC-HPC and Supercomputing conferences and more recently, providing leadership for the Future Computing with the Rogues Gallery VIP as they research applications of novel compute architectures. Prior to joining PACE, Aaron studied free neutron and nuclear beta decay as a precision test of the Standard Model, which entailed a diverse range of activities, including particle simulation and detection, digital and analog signal processing, and algorithm optimization across x86, GPU, and FPGA architectures.